1. Field of Invention
The present invention relates to a charge pump, and particularly to a charge pump with fewer capacitors and capable of providing at least a first output voltage and a second output voltage.
2. Description of the Related Art
In an electronic circuit, a plurality of charge pump circuits are usually required for providing various power voltage levels. If, for example, an electronic circuit needs a voltage of two times as high as the power voltage level and a negative voltage of the power voltage level, there must be a charge pump circuit with a voltage doubling circuit (as shown in FIG. 1) to provide a double positive voltage level VOUT+ and another charge pump circuit with a negative voltage circuit (as shown in FIG. 3) to provide a negative power voltage level VOUT−.
FIG. 1 is a schematic circuit drawing of a conventional voltage doubling charge pump circuit. FIG. 2 is a schematic chart showing the control signal timing of the charge pump switches in the FIG. 1. Referring to FIG. 1 and FIG. 2, during a charge period CP, the control signal ph1 takes a high level and the control signal ph2 takes a low level. The control signal turns on the switches 101 and 102, and turns off the switches 103 and 104. At this time, an input voltage VIN and a ground voltage GND are coupled to both sides of the capacitor 105 and charge the capacitor 105 so that the voltage difference between the node N1 and node N2 takes the input voltage VIN. During the following pump period PP, however, the control signal ph1 takes a low level and the control signal ph2 takes a high level. Thus, the switches 101 and 102 are off, and the switches 103 and 104 are on. Meanwhile, the voltage level of the node N2 rises from the original ground voltage 0V to the input voltage VIN. In this way, the level of the node N1 rises from the original voltage VIN to 2VIN and the capacitor 106 is charged, and 2VIN serves as a positive output voltage VOUT+.
FIG. 3 is a schematic circuit drawing of a conventional negative voltage charge pump circuit. The control signal timing of the charge pump switches in FIG. 3 is the same as in FIG. 2. Referring to FIG. 3 and FIG. 2, during a charge period CP, the control signal ph1 takes a high level and the control signal ph2 takes a low level. The control signal turns on the switches 301 and 303, and turns off the switches 302 and 304. At this time, an input voltage VIN and a ground voltage GND are coupled to both sides of the capacitor 305 and charge the capacitor 305 so that the voltage difference between the node N3 and node N4 takes the input voltage VIN. During the following pump period PP, the control signal ph1 takes a low level and the control signal ph2 takes a high level. Thus, the switches 301 and 303 are off, and the switches 302 and 304 are on. Meanwhile, the voltage level of the node N3 drops from the original VIN to the ground level 0V. In this way, the level of the node N4 drops from the original voltage 0V to −VIN and the capacitor 306 is charged, and −VIN serves as a negative output voltage VOUT−.
For an integrated circuit, capacitor components, for example the capacitors 105 and 106 in FIG. 1 and the capacitors 305 and 306 in FIG. 3, usually occupy a lot of space, which leads to a high production cost. Even if the capacitor components are moved outside of the IC, i.e. the capacitor components become external components of the IC, the external capacitors would still increase the cost.